Yearly Archives: 2016

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TULIPP project at “FPGA Forum” in Trondheim, Norway – 15. – 16. February 2017

Tulipp project will be presented by Magnus Jahre (NTNU) and Magnus Peterson (Synective Labs) at the FPGA Forum. About FPGA forum: FPGA-forum is a yearly event for the Norwegian FPGA community. FPGA-designers, project managers, technical managers, researchers, final year students and the major vendors gather for a two-day focus on FPGA. There will be presentations

PEPGUM 2017 Workshop at HiPEAC

Our “Power-Efficient GPU and heterogeneous Multi-/Many-core Computing” (PEGPUM) workshop has been accepted for inclusion in the HiPEAC event in 2017. The workshop will be held on January 24, 2017 in Stockholm, Sweden, co-located with the HiPEAC conference. This will be the 5th PEGPUM workshop, after PEGPUM 2013, PEGPUM 2014, PEGPUM 2015, and PEGPUM 2016. Previous

Tulipp project at FPGA World Conference’2016 on September 13th 2016 in Stockholm

The FPGAworld Conference is an international forum for researchers, engineers, teachers, students and hackers. It covers topics such as complex SW/HW embedded systems, FPGA based products, educational & industrial cases and more. It is a discussion and network forum for researchers and engineers working on industrial and research projects, state-of-the-art investigations, development, and applications. Magnus

Tulipp project at the First European Machine Vision Forum 2016 (EMVA)

Tulipp project will be presented by Fraunhofer in a poster session at the First European Machine Vision Forum (EMVA 2016) which will take place on September 8 to September 9 2016 in Heidelberg University, Germany. The European Machine Vision Forum is a new annual two-day event of the European Machine Vision Association (EMVA). The aim

3rd Technical and Project Management Meeting of Tulipp held at NTNU in Trondheim, Norway

The third technical and project management meeting of the European Commission’s Horizon 2020 Framework Programme’s project Tulipp took place on Tuesday 16 and Wednesday 17 August 2016 at NTNU in Trondheim, Norway. The meeting was attended by representatives by all Tulipp partners, who reviewed the progress of the project and set forth the work plan

TULIPP presentation in the HIPEAC Info Magazine

The HIPEAC Info Magazine 47 has published an article entitled “New European research on image processing and heterogeneity”, which describes two H2020 projects recently launched : TULIPP and TANGO projects. The article describes the project developments and its structure. For more information: https://www.hipeac.net/assets/public/publications/newsletter/hipeacinfo47.pdf

TULIPP participation in collaboration workshop “Advanced Computing and Cyber-Physical Systems 2016”, 14 JUNE 2016 in Brussels

Diana Goehringer and Flemming  Christensen had been invited by the European Commission DG CONNECT and HiPEAC to present TULIPP project. The workshop was an opportunity to exchange with the "Cyber-Physical Systems", "Advanced Computing" and the “Mixed Criticality Systems" project clusters financed by the European Commission under FP7 ICT Call 10 2013 "Advanced computing, embedded and

TULIPP at Embedded Vision Summit 2016 MAY 2-4, Santa Clara, California

Philippe MILLET (as coordinator) participated as Exhibitor at Embedded Vision Summit, presenting how TULIPP project will provide vision-based system designers with a reference platform (hardware solution, operating system and programming tool chain) for high performance and energy-efficient image processing embedded systems. The event took place in Santa Clara, California, United States, on 2-4 May 2016

Tulipp booth at the Embedded Vision Summit (EVS), Santa Clara, CA, USA, 2nd and 3rd of May 2016

Founded in 2011, the Embedded Vision Alliance (EVA) is led by Berkeley Design Technology, Inc. (BDTI), an independent technology analysis and engineering services firm. The EVA is a worldwide industry partnership that brings together technology providers who are enabling innovative and practical applications for computer vision. Its more than 50 members include suppliers of processors,