The performance of the reactive obstacle avoidance was tested on real objects in a hardware in the loop (HIL) setup. In our approach the disparity image is calculated on Xilinx Ultrascale+ FPGA and transformed into U-map and V-map. The images are filtered and waypoints are estimated. The application runs in the DJI Simulator.
Welcome to the advisory board, Erle Robotics Calle Venta de la Estrella, 6 Pab. 130, 01006 Vitoria, Álava, Spain http://erlerobotics.com Tel. 0034 945 30 68 20
Date and Time Thu 12 July 2018 - 08:30 – 17:00 BST Location Sheaf 4301, Sheffield Hallam University Howard Street, Sheffield. S1 1WB REGISTER HERE There is growing momentum for Multi-Processor System on chips (MPSoC) to be used as highly adaptive and efficient accelerators for machine vision and image processing applications. Such systems are composed
Ben Rodriguez, CEO of Hipperos, showcases the hardware accelerated image processing ability of the Sundance EMC2 TULIPP board using the Hipperos RTOS.
The use of Unmanned Vehicles (UVs) in different markets has increased significantly. Currently, most important markets are aerial video/photography, precision farming and surveillance/monitoring. Ongoing technical development, e.g. in size, endurance and usability, enables the use of UVs in even more areas and the Tulipp Platform will provide a good starting point. More here - http://tulipp.eu/surveillance-and-rescue-uavs/
TULIPP at HiPEAC 2018 - January 22-24, Manchester UK. European Network on High Performance and Embedded Architecture and Compilation Presentation slides:
In this simple demo, the Sundance EMC2-DP (equipped with a Zynq-7030) is connected to a 720p HDMI camera and an HDMI screen. The board is running the HIPPEROS Real-Time Operating System which executes a task cycling between: A simple HDMI pass-through, The CPU implementation of the grayscale filter (~15fps) The FPGA accelerated implementation of the
